A conventional MOSFET operates by driving current through the channel region between the source and drain of a device. The conductivity of the channel region is modulated by the application of a voltage on the conducting gate above the channel surface and insulated from it. Efforts are ongoing within many MOS integrated circuit manufacturing companies as well as at many universities and government laboratories to improve the speed and available drive currents of MOSFETS to reduce their power consumption, and to improve their reliability and radiation hardness for applications in harsh or remote environments, including space.
Silicon-on-insulator (SOI) is a generic term describing technologies in which the MOSFET's or other active devices are built in a thin film of silicon over an insulating layer on a substrate. The presence of the insulator reduces the parasitic capacitances in the MOSFET compared to a bulk silicon device, resulting in an improvement in the speed and power dissipation of MOS integrated circuits, as well as improved immunity to single-upset of MOS memory elements in a radiation environment.
One of the goals in semiconductor processing is to maximize the use of the available silicon area. This allows increased miniaturization of the electronic circuitry. In particular, it is desirable to maximize the drive current for a given silicon area. Dual gate devices in which the drive current is doubled or a given silicon area have been created. Further improvement in maximizing the drive current for a given silicon area is desirable.